If we could get a larger chip on our designs we would, to what extent is this a fixed maximum limit?
Are there any plans on the roadmap to increase this?
Would it require new hardware revisions to increase?
This is mainly due to the device being in “3 byte” address mode hence the 16MB limit. We could add support for larger devices if there was a requirement.
In the meantime you could use an additional SPI flash on one of the SPI buses (and use the spiflash library), but that’s a little messy. How big a device were you looking at? Got a specific part number?
We are using a 64Mbit flash card (S25FL164K0XMFI011) but are considering revising.
We store second-by-second data in case of communication loss, which adds up pretty quickly, especially with multiple sources. Due to the lack of multi-threading its a trade-off to allocate power to do more serious compression especially when we need to record so regularly.
As for a specific size, a 1 or 2Gbit chip (e.g. W25M02GVZEIG) would give us a lot more room to play with.