Imp005: Reset and power down require external pull high if not used?

The imp005 has a reset and a power down pin. Should these pins have any components, ie do we need to tie them high or is this done internally?

Looking at the schematics, it is optional to have switches with resistor to pull low and no mention of anything to pull high so assuming no connection is fine if not using, just like to confirm.


The datasheet (section 14.1) depicts an external pull-up on PWR_DWN_L (and WAKE_L) but describes RESET_L as having an internal pull-up.


Your right. Thanks :Peter. :slight_smile:

As noted, in please do not use RESET_L as a reset. It doesn’t behave how any design engineer expects a reset to behave.

Instead use PWR_DWN_L as your reset; also see the latest imp005 breakout design - Cypress now recommend a reset supervisor on this pin to ensure reliable power up operation.

@hugo, Bit confused on the Cypress comment. The datasheet ( 18.1.1) says

The CYW43907 has an internal power-on reset (POR) circuit. The device will be held in reset for a maximum of 110 ms after VDDC and VDDIO have both passed the POR threshold

Would you have a reference I can pass on to my electrical engineer?


The info about using an external reset chip came from Cypress engineers during a review - they added this guidance at least a year after the chip was released. I’m not sure their docs mention it at all; we updated our reference designs at that time.