Hi I am having a strange issue with IMP002 running the same model as an IMP001. I have a few 002s running and they all seem to fail to connect to the WiFi after running several cycles of a wake up - report - sleep routine. The model is running absolutely fine on the IMP001. And it runs fine for quite some number of cycles on the 002s. But eventually the imp fails to connect, exits with WiFi outage and then reboots. Sometimes it just hangs up by reporting “Device Connected” every three or so seconds on the console.
Hugo, Peter - thanks for your response. It is a board I built broadly following the Nora design. So it has the power management circuitry and is on AAs. VDDA is correctly connected to VDD. hardware.voltage readings are all in 2.7 - 3.1 range.
I finally had a close look at Nora gerbers and realised that a key difference was my power lanes were not as thick. Do you think this could cause a problem?
Bit worried about the voltage varying that much; things like layout are critical for DCDC converters and if you have this wrong then the load transient behavior will be suboptimal. WiFi turning on is a big load transient…
Can you post the design and layout? (if you’re a commercial customer, then put it on a support ticket for private review)
Hi Hugo - the voltage does not vary for the same imp; I meant to say the three different 002s I have running are at different battery voltages - all between 2.7 and 3.1.
I am not yet a commercial customer - just very close to being one!
Attached are the design and layout of the basic device I am testing. As you can see the power circuit is borrowed from Nora.
Swieter - the devices are being powered by their own AAs.
I suspect this is a PSU issue; your layout of the DCDC is a long way from ideal. If you can copy the Nora layout closely (component placement, via placement, trace width etc) you will do a lot better.
eg: the feedback network is not well placed, the inductor and input cap both likely need to be rotated 180 degrees and connected with thicker traces, etc. DCDCs are very touchy about optimal layout.
You may be able to improve the performance with this layout by adjusting the feedback network to boost to 3.3v vs 3.0v (gives more headroom when the voltage dips) and increasing the output capacitance on your “VBAT” line, eg change C1, C2, C9 to 22uF as these are all the same physical size anyway… but you should fix the DCDC layout.
Note that it’s a bit strange having the actual battery net called VCC and the PSU-generated voltage VBAT, I’d usually expect those the other way round. Your power traces could also all do with being thickened up significantly.
When you say adjusting the feedback network do you mean selecting the bridge resistor values to give me 3.3v? Did not quite follow what rotating by 180 does…
The VBAT vs VCC was a sloppy mistake which I realised too far into that design. Have changed it since.
If you look at the trace to the inductor, then to the cap, this goes the long way round. If they were both rotated, it’d be neater.
Yes on the adjusting resistor values to get the higher voltage which means if it droops, it has further to go before it causes problems. Changing the caps essentially does the same thing - helps to reduce harmful droops due to bad transient behavior.
You also need way more GND vias. Right now there are no vias which connect the top and bottom planes excepect at the imp. Since one of the GND pins of the DCDC is tied to the bottom layer all of the current has to flow from the left side of the board all the way over to the imp then up the via then all the way back. That will create all kinds of problems.
I’d say you need at least another 20 GND vias around the outside edge of the board and a bunch around the power supplies and undervoltage lockout.