Mainly, this part is designed to work in super low power situations from a single coin cell - which start at ~3v and are discharged at about ~2.5v, hence the chip can work down to 2.0. In a wifi application, you’re likely to be using an LDO to generate the 2.0v from 3.3v anyway, so the current usage is identical if you run it from 3.3v vs 2.0v - the extra power is just burnt in the LDO vs the sensor.
The critical thing here is whether VDDIO is powered from 3.3v. If VDDIO is 2.0v, then the high level output on the MISO line will be 2.0v. Vih(min) - the voltage at which a logic 1 is reliably registered - for 3.3v devices is 0.7x3.3 = 2.31v. Hence, your MISO may be working, but the imp can’t see logic 1 as the voltage is too low.
Series resistors in the path are usually to reduce noise/overshoot (source termination). They’re important at high speeds and for production designs, but won’t affect the interfacing much here.
Summary: I think your problem may be VDDIO being 2.0v.